Last night we spend atleast 3 hours to track down a little bug in the cpu fuse settings. After running first tests on the hardware we got debug uart and some basic sreg addressing working.
Then we started to implement a sram read/write round trip. We found out that we read for all sram cells the same value as the last value which was written. So we stepped through the schematics and traced all IO lines and logic involved in the sram addressing process. First we analysed the sreg setup and the address counters. Then we checked the busdriver and the sram multiplexer. But this looked all out. Finally we found the problm that the WR line from the AVR to the sram is not pulled high when set in software.
So we looked for shortcircuits but didn’t find anything. Last guess was the mcu is broken, but finally we found out that we had a false fuse setting. So our IO pin was configured to passthru the clock signal on that pin. Fixed that and so basic sram read/write is working.
Tonite we gonna test bulk transfer. Hopefully this time we don’t have so nasty bugs.
These two pictures show the different functional blocks of the prototype design. On the top side you have the MCU and next to it the connector for In-System-Programming and the MMC/SD daughter board. The yellow block marks the usb hardware for emulated software-usb on the mcu, the green block is the ram section. The orange block on top, right under the cart edge connector marks the bus transceivers to connect or disconnect the snes to the ram interface. The blue block overlays the transceiver for data access to the ram from the mcu side. The logic gates are for lo-/hiram switching and to disable write access to the ram section from the snes side.
On the bottom side you have a socket for the cic-lockout chip and the rest of the bus transceivers to connect or disconnect the snes. In the lower half you have shift registers to preset a certain adress to the adress counters. These counters are connected to the ram via bus transceivers, so you can access large memory with only a few io-pins on the mcu side. The red block is a demultiplexer to distribute the 22bit adresses to the 19 bit adresses of the ram ics.
Block diagramm bottom
Block diagramm top
This monday morning the long awaited first prototype PCB arrived from pcb-pool. We had a little UPS problem on friday, so we had to wait till monday to get the PCB. Max just started to solder all the chips, looking forward to get a working usb uploader firmware running till the next weekend.
I think the PCB looks really good and iam looking forward to power it up soon…
Got an mail from pcb-pool.de, our PCB is nearly done and will arrive this week. So the first prototype will be assembled over the weekend. Keep fingers crossed that everything is working as planed.
Quick Featuers list
- ATMega 644
- Software USB
- FTDI USB Debug port
- 4MB SRAM
- LO/HI Rom Switch
- SD Card Daughter Board
- AVR Cart IRQ Trigger
- AVR WR sniffer
Things not happping with this version
- Save Game support by design
- DSP Support
Yesterday i learnt from Lint that there is a new Snes toolchain coming down. The Project can be found herehttp://code.google.com/p/snes-sdk/. Right now i have it running under linux. Just working on a patch for os x. Thumbs up to Ulrich Hecht for his work on this project.
- WLA DX Assembler Backend
- 816-tcc C Compiler
- 816-opt ASM Source Code optimizer
- crt0_snes Startup code in asm
- libc.asm Tiny libc in asm
david@slap:[~/Devel/arch...h/snes/snes-sdk]$ ls -l
drwxr-xr-x 2 david david 4096 2009-04-27 13:52 bin/
drwxr-xr-x 3 david david 4096 2009-04-27 14:04 libs/
-rw-r--r-- 1 david david 1387 2009-04-27 13:59 Makefile
drwxr-xr-x 11 david david 4096 2009-04-27 14:01 snes9x/
drwxr-xr-x 3 david david 4096 2009-04-28 09:29 snesc/
drwxr-xr-x 7 david david 4096 2009-04-27 14:14 tcc-65816/
-rw-r--r-- 1 david david 11304 2009-04-27 13:24 TODO
drwxr-xr-x 16 david david 4096 2009-04-27 13:59 wla_dx/
-rw-r--r-- 1 david david 7946 2009-04-27 13:23 crt0_snes.asm
-rw-r--r-- 1 david david 6096 2009-04-27 13:59 crt0_snes.obj
-rw-r--r-- 1 david david 1755 2009-04-27 14:04 hdr.asm
-rw-r--r-- 1 david david 7108 2009-04-27 13:23 libc.asm
-rw-r--r-- 1 david david 12160 2009-04-27 13:59 libc.obj
-rw-r--r-- 1 david david 11087 2009-04-27 13:23 libm.asm
-rw-r--r-- 1 david david 14670 2009-04-27 13:59 libm.obj
-rw-r--r-- 1 david david 6051 2009-04-27 13:23 libtcc.asm
-rw-r--r-- 1 david david 10101 2009-04-27 13:59 libtcc.obj
-rw-r--r-- 1 david david 132 2009-04-27 13:46 Makefile
drwxr-xr-x 6 david david 4096 2009-04-27 13:24 .svn/
Compile run of the demo game
rm -f snesc.smc snesc.sym data.obj graph_asm.obj str.obj
snesc.obj input.obj init.obj graph.obj *.s
/home/david/Devel/arch/snes/devkit/bin/wla-65816 -io data.asm data.obj
/home/david/Devel/arch/snes/devkit/bin/wla-65816 -io graph_asm.asm graph_asm.obj
/home/david/Devel/arch/snes/devkit/bin/wla-65816 -io str.asm str.obj
/home/david/Devel/arch/snes/devkit/bin/816-tcc -I. -o snesc.s.pre -c snesc.c
/home/david/Devel/arch/snes/devkit/bin/816-opt snesc.s.pre > snesc.s
optimization pass 1: 411 optimizations performed
optimization pass 2: 204 optimizations performed
optimization pass 3: 1 optimizations performed
optimization pass 4: 0 optimizations performed
616 optimizations performed in total
/home/david/Devel/arch/snes/devkit/bin/wla-65816 -io snesc.s snesc.obj
/home/david/Devel/arch/snes/devkit/bin/816-tcc -I. -o input.s.pre -c input.c
/home/david/Devel/arch/snes/devkit/bin/816-opt input.s.pre > input.s
optimization pass 1: 5 optimizations performed
optimization pass 2: 2 optimizations performed
optimization pass 3: 0 optimizations performed
7 optimizations performed in total
/home/david/Devel/arch/snes/devkit/bin/wla-65816 -io input.s input.obj
/home/david/Devel/arch/snes/devkit/bin/816-tcc -I. -o init.s.pre -c init.c
/home/david/Devel/arch/snes/devkit/bin/816-opt init.s.pre > init.s
optimization pass 1: 74 optimizations performed
optimization pass 2: 29 optimizations performed
optimization pass 3: 0 optimizations performed
103 optimizations performed in total
/home/david/Devel/arch/snes/devkit/bin/wla-65816 -io init.s init.obj
/home/david/Devel/arch/snes/devkit/bin/816-tcc -I. -o graph.s.pre -c graph.c
/home/david/Devel/arch/snes/devkit/bin/816-opt graph.s.pre > graph.s
optimization pass 1: 7 optimizations performed
optimization pass 2: 4 optimizations performed
optimization pass 3: 0 optimizations performed
11 optimizations performed in total
/home/david/Devel/arch/snes/devkit/bin/wla-65816 -io graph.s graph.obj
/home/david/Devel/arch/snes/devkit/bin/wlalink -dvSo data.obj graph_asm.obj
str.obj snesc.obj input.obj init.obj graph.obj snesc.smc
Section ".libc_misc" was discarded.
Section ".libc_cstd" was discarded.
Free space at $6833-$7fb1.
Free space at $7fb6-$7fbf.
Free space at $7fe0-$7fe3.
Free space at $7ff0-$7ff3.
Free space at $8000-$3ffff.
Bank 00 has 06033 bytes (18.41%) free.
Bank 01 has 32768 bytes (100.0%) free.
Bank 02 has 32768 bytes (100.0%) free.
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235409 unused bytes of total 262144.
../../tool/bsnes/bsnes snesc.smc || xset r on
SNES SDK running a demo game
Had a big breakthrough yesterday with our Super Nintendo Snesram project. Got
for the first time a commercial game running. This was quite a hard one.
Spend a great amount of time debugging the memory uploads routines. I had to
add CRC checks to both sides of the hardware. An AVR hosted CRC memory check
and SNES hosted CRC check, showed us that our addressing was done
correctly. But we found out that no commercial game ran on our hardware. Why
that ??? More testing showed that we got a lot of memory corruption while
starting a game. First we thought that the bus driver switching ( which was
quite lazy implemented) caused the memory corruptions. Fixing that help a
little, we could boot Super Mario World. But that would crash right after the
start. Finally we found out that we shouldn’t map the WR line of the cartridge
to our sram. We always thought the snes uses an unique address space for the
rom and save game ram mapping. This might be true for the cpu address space but
not for the cartridge address space. So the games constantly wrote to save game
ram and destroyed the actual rom content….Fixing that worked out perfectly.
Right now we support up to 4mbit games. But We don’t have any save gave support
at all. Also HI ROM support isn’t tested yet.
The good thing is, now that we have our poc working we can move on to build an
actual pcb. Our main focus will be on homebrew stuff, so running all kinds of
commercial game is not our first target. This implies some hardware design
decision. We want to go for software usb for the bulk rom upload, and another
ftdi based usb for the cpu debugging or even for an control and user
interface. Like a little remote login shell to upload roms, peek and poke
memory…name it. If we have the board running with usb i see a lot of
features coming up. I am not sure if we go for an sd card slot, which in my
views is only interesting for gamers.
Also i have to admit that our approach, using an cpu and a static memory
addressing mode is limited. The way how Scott is
doing this gives him a lot more options to handle the black magic snes rom
layouts. Also he will have the option to synthesize DSP and FX chips onto his
fpga. So we might see him playing super mario kart on his board 🙂
But i also see an advantage in our design i guess if we make pcb kits they will be
suitable to be build by an average hobbyist geek.
Checkout the new logic analyser
Bus Driver Hotfix
Super Mario World running
The magic setup
We have been working the last 4 Weekends on a cool side project – we built a DIY Super Nintendo development hardware. As a SNES Programmer or SNES Nerd you always want to run your code on the orignal hardware. But this is only possible using old backup stations from the 90ies like the Super Wild Card or Game Doctor. But all these tools lack cool features like SD Card support, USB connection or real time debugging. I own an old Super Wild Card and its a pain in the ass. I can’t get the parallel port connection working and so i have to use the builtin floppy drive 🙂 There are newer projects around, but either not working or not really cool.
So we decided to build our own hardware. Today we got our proof of concept working. Its based on a STK500 setup using a ATmega16 (Ja.. I fried the ATmega32 while setting the fuses..). Attached is a SD Card and a home cooked memory bus driver for one 512k SRAM Chip.
Both the ATmega and the SNES memorybus are connected to this SRAM via busdrivers. The ATmega does the housekeeping and manages the access to the RAM. To save IOpins on the ATmega side, we use shiftregisters and counter to set the adress. On the SNES side its connected to a Snes Multi Cartridge Adapter. One slot holds an orginal game, so we can use the lockout chip from there and solder the data and address from the other slot to our memory interface.
Now we are able to upload a 2Mbit SNES rom. A mario sprite on flashing background. We load this rom image from the SD Card and write it to the attached SRAM. When this is done we switch the busdriver and connect it to the SNES memory bus. Today we got the demo working.
See the video and pics.
We did like 3 other proof of conecpts before to get this working.
Watch the Video on vimeo to get HD and see the console output
Right now we are planing the features for version 0.1. Its mainly to get a good hardware design
the cool software features are planed for version 0.2
- ATmega 644
- 4mb SRAM
- Address Counter
- Address SREG
- LO/HI Rom support
- Lockout Chip
- Save game SRAM
- SD Card Support
- Software USB
- USB Upload Client
- Software Mode Switch
- Remote Reset
The Project is hosted at Assembla.com
And the poc code is here
I had so much fun finding out how good the Snes9x GX Emulator for the Wii is. I never really got into the Wii hacking scene yet, just keept a little and h following the exploiting status of the wii. So when the Homebrew Channel came out, i installed it. But never really did something useful with it. But this weekend i installed Snes9x and it really rocked. Super performance, no framedrops or broken sound. And the GFX looks really crisp. Nothing compared to the last exprience i had when i hooked a Nintendo Jr. to my flatscreen tv. it looked really really crap. Dont get me started NTSC, composite signal and a tv software scaler..uh..really crap, unplayable. But the Emulator stuff looks really good on the big screen.
After testing Mario Kart i got pissed off the Wii Controllers. You are supposed to use them in the same manner as in Wii Mario Kart. Steer with Up and Down button and accel with the  Button. But no R and L buttons. Without them Mario Kart is no fun. After a quick internet research i found a project to connect and orginal Super Nintendo controller via the Gamecube connectors to the Wii. Its a little more complicated than a simple piggy tail, since the protocol used by the Gamecube and Super Nintendo are totally different.The Gamecube uses a more complex protocol so that you need a microcontroller to do the conversion.
Yesterday was DIY sunday, soa friend and me threw this thing together. And it works really good. My friend got so hooked, so he is planing to make some more of the controllers and put them on ebay.
So the next thing could be an Chip-8 emulator runinng on a medium sized Atmega.
CHIP-8 is an interpreted programming language, developed by the late Joseph Weisbecker. It was initially used on the COSMAC VIP and Telmac 1800 8-bit microcomputers in the mid-1970s. CHIP-8 programs are run on a CHIP-8 virtual machine. It was made to allow video games to be more easily programmed for said computers.
CHIP-8’s memory addresses range from 200h to FFFh, making for 3,584 bytes. The reason for the memory starting at 200h is that on the Cosmac VIP and Telmac 1800, the first 512 bytes are reserved for the interpreter. On those machines, the uppermost 256 bytes (F00h-FFFh on a 4K machine) were reserved for display refresh, and the 96 bytes below that (EA0h-EFFh) were reserved for the call stack, internal use, and the variables.
CHIP-8 has 16 8-bit data registers named from V0 to VF. The VF register doubles as a carry flag.
The address register, which is named I, is 16 bits wide and is used with several opcodes that involve memory operations.
The stack is only used to store return addresses when subroutines are called. The original 1802 version allocated 48 bytes for up to 12 levels of nesting; modern implementations normally have at least 16 levels.
CHIP-8 has two timers. They both count down at 60 hertz, until they reach 0.
There are two version of the platform, the Chip-8 and schip (Super Chip). The biggest difference is the display size.
Super Chip 128×64
But most import it has some decent games:
I found some ugly c code code here, cleaned it up and made an SDL version on OS X.